The present invention relates to the manufacture of wafers, such as silicon wafers, and, more particularly, to an improved method for lapping the opposed major surfaces of a wafer.
Wafers, such as silicon wafers, form the substrate upon which a variety of semiconductor devices are fabricated. In order to ensure that the semiconductor devices perform properly, wafers must generally be fabricated to exacting specifications. Additionally, wafers must be manufactured in an efficient and economic manner, since the sale of wafers to the various device manufacturers is quite cost competitive.
The manufacture of wafers involves a number of sequential steps to produce a wafer that meets the exacting specifications of the various device manufacturers. Initially, a crystal ingot is grown, such as by the Czochralski method. The crystal ingot is sliced into a plurality of wafers. The edge of each wafer is then generally ground to properly size the wafer and to impart the desired profile, such as a rounded or chamfered profile, to the edge of the wafer. The opposed major surfaces of the wafer are then lapped in order to planarize the wafer by reducing thickness variations and improving flatness across each major surface. According to one lapping technique, the opposed major surfaces of each wafer are lapped with a 1200 grit slurry so as to reduce the total thickness of the wafer by about 70 microns.
The opposed major surfaces are then typically etched so as to reduce the number of surface defects. Conventionally, the opposed major surfaces are subjected to a wet chemical etch using an alkali etchant, an acidic etchant or a combination of both alkali and acidic etchants. However, the opposed major surfaces may be dry etched if desired, as described in U.S. patent application Ser. No. 10/361,280, filed concurrently herewith and entitled METHOD FOR FABRICATING A WAFER INCLUDING DRY ETCHING THE EDGE OF THE WAFER, tie contents of which are incorporated herein by reference. Typically, the etching process removes about 20 microns in total from the opposed major surfaces. The edge of the wafer is then etched and/or polished. In this regard, the edge may be subjected to a wet chemical etch followed by polishing. Alternatively, the edge of the wafer may be dry etched as also described by above-referenced patent application, along with an optional polishing operation.
Thereafter, at least one of the major surfaces is polished to have the desired mirrored finish. For those applications in which only a single side of the wafer is polished, the polishing operation may remove about 12 microns in thickness from the front side of the wafer. Alternatively, in those applications in which both of the opposed major surfaces are polished, the polishing operation may remove about 22 microns in total from the front and rear surfaces of the wafer. While the polishing operation removes less material than the lapping and etching processes, the polishing operation generally takes substantially longer to remove the same amount of material and is therefore a substantial factor in the overall cost and efficiency with which the wafers are fabricated.
Each step of the wafer fabrication process has many variations depending upon the application. With respect to lapping of the wafer, for example, lapping techniques have been developed that successively lap the opposed major surfaces of the wafer with different slurries. By way of example, one lapping technique initially removes about 70 microns in total thickness from the opposed major surfaces with a 1200 grit slurry. Instead of proceeding to the etching operation as described above, the opposed major surfaces of the wafer may then be subjected to further lapping with a 1500 grit slurry in order to remove another 30 microns in total thickness from the wafer. By lapping with the 1500 grit slurry, the quality of the wafer surface is improved so that the wafer surface exhibits shallower surface pitting, thereby resulting in more efficient etching and polishing of the major surfaces. Unfortunately, this multi-step lapping operation removes more material than conventional lapping processes and accordingly substantially increases the time expended during the lapping operation.
As described above, it would be desirable to improve the overall efficiency of the wafer fabrication process while maintaining or improving the quality of the wafers fabricated thereby. In this regard, it would be desirable to improve the wafer fabrication process such that the overall process for fabricating a single wafer is at least somewhat less expensive. In this regard, even a modest decrease in the cost to fabricate a single wafer can represent a large savings to a wafer manufacturer in view of the multitudes of wafers fabricated each year.
An improved method for lapping the opposed major surfaces of a wafer is provided in accordance with the present invention. The improved lapping method increases the efficiency of the overall wafer fabrication process, while maintaining or improving the quality of the wafers produced thereby. In this regard, embodiments of the present invention provide a multi-step lapping process in which lapping continues while transitioning from a first slurry to a second slurry so as to reduce the overall length of the lapping process. In addition, the multi-step lapping process of the present invention is optimized so as to remove no more than about 90 microns in total thickness from the opposed major surfaces of the wafer so as to similarly reduce the time required for the overall lapping process. By completing the lapping with slurry having smaller abrasive particles, wafers are produced that have improved quality, such as by having shallower surface pitting, relative to wafers fabricated in accordance with conventional fabrication techniques that utilize a single lapping step with 1200 grit slurry.
According to the present invention, the first and second opposed major surfaces of a wafer are initially lapped with a first slurry. After reducing the thickness of the wafer by a desired amount with the first slurry, a second slurry is introduced and the lapping of the major surfaces continues with the second slurry. In this regard, the lapping continues while introducing the second slurry such that the major surfaces are exposed to a combination of both the first and second slurries for a period of time. Thereafter, the major surfaces of the wafer are predominantly exposed to and lapped by the second slurry.
Both the first and second slurries include abrasive particles, with the abrasive particles of the second slurry being smaller on an average than the abrasive particles of the first slurry. For example, the first slurry may be no more than 1200 grit so as to have abrasive particles with an average size of at least 8 microns. In this regard, the first slurry may be 1200 grit, 1000 grit, or less. Conversely, the second slurry is advantageously at least 1500 grit so as to have abrasive particles with an average size of no more than about 6 microns. As a result of the relative sizes of the abrasive particles of the first and second slurries, lapping of the wafer with the first slurry proceeds more quickly, i.e., with a greater removal rate, than lapping of the wafer with the second slurry. Additionally, by continuing to lap the wafer while introducing the second slurry, the removal rate gradually transitions from the faster removal rate associated with lapping of the wafer with the first slurry to the slower removal rate associated with lapping of the wafer with the second slurry.
According to the present invention, the lapping of the major surfaces of the wafer with the first and second slurries collectively removes no more than about 90 microns in total thickness and, in one advantageous embodiment, removes no more than about 80 microns in total thickness and, in one particularly advantageous embodiment, no more than about 70 microns in total thickness. Of this, lapping of the major surfaces of the wafer with the first slurry advantageously removes more material than that removed by continuing to lap the major surfaces of the wafer with the second slurry. In this regard, the lapping of the major surfaces of the wafer once the second slurry has been introduced may remove no more than about 25 microns in total thickness and, in one advantageous embodiment, no more than about 20 microns in total thickness.
By completing the lapping process with a slurry having smaller abrasive particles, the quality of the wafer at the commencement of the etching process is improved, such as by having shallower surface pitting. Thus, the etching and polishing operations may proceed more efficiently, thereby decreasing the time required for the etching and polishing operations and reducing, in some embodiments, the total thickness of the wafer that must be removed during the polishing operation. Moreover, by reducing the total thickness of the wafer that is removed by the lapping process of the present invention relative to conventional multi-step lapping processes and by reducing the quantity of material that must be removed by lapping with the slurry having the smaller abrasive particles, the time required for the overall lapping process of the present invention is correspondingly reduced, which also serves to improve the efficiency of the overall wafer fabrication process.